1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, particularly, a method of forming buried wiring of a semiconductor device.
2. Description of the Related Art
In a general procedure of forming a buried copper wiring structure, an insulating layer is formed on a semiconductor substrate (wafer) on which a semiconductor element is formed; a trench for wiring is formed in this insulating layer; copper is deposited on an area including the inside of this trench; then the surface is flattened through chemical mechanical polishing (CMP), as disclosed in for example Japanese Patent Application Kokai (Laid-Open) Publication No.2000-3912 and Japanese Patent Application Kokai (Laid-Open) Publication No.2002-359244. If a thick oxide layer has been produced on a surface of the copper layer deposited on the wafer in the course of leaving the wafer in the atmosphere or the like, the speed of CMP decreases. In an early stage of CMP, the oxide layer is removed by applying a high polishing pressure in order to improve the throughput. Furthermore, in a next stage, the polishing pressure is lowered in order to reduce dishing which results from excessive polishing in a surface of the copper layer filling the trench, and erosion which will lead to unevenness in thickness of the insulating layer.
A requirement for an insulating layer disposed between conductive layers overlapping vertically or between conductive layers neighboring horizontally in a semiconductor device is a minimized dielectric constant (a low dielectric layer or a low-k dielectric layer). If the density of the insulating layer is lowered by increasing porosity, for instance, to provide a low-k dielectric layer, the mechanical strength of the insulating layer decreases, thereby increasing the possibility of troubles such as the delamination of the layer during polishing. Accordingly, a minimized polishing pressure lower than 1.5 psi, for instance, is required, and it is becoming increasingly hard to adopt the above-described technique to change the polishing pressure. If both the dielectric constant of the insulating layer and the polishing pressure are further lowered, the throughput will remarkably decrease.
A chemical solution containing complex ions may be used in CMP, to form a copper complex having lower mechanical strength than copper. However, the reaction of the complex ions and the oxide layer is too slow to achieve a sufficiently high polishing speed at a lowered polishing pressure.